Study of SiGe selective epitaxial process integration with high-k and metal gate for 16/14 nm nodes FinFET technology
Wang Guilei
Qin Changliang
Yin Huaxiang
Luo Jun
Duan Ningyuan
Gao Xing-Yu
Yang Tao
Li Junfeng
Yan Jiang
Zhu Huilong
Wang Wenwu
Chen Dapeng
Ye Tian-Chun
Zhao C.
Radamson Henry H.
· 2016
期刊名称:
Microelectronic Engineering
2016 年
163 卷
摘要:
In this study, the process integration of SiGe selective epitaxy on source/drain regions, for 16/14 nm nodes FinFET with high-k & metal gate has been presented. Selectively grown Si